Hardware Processing Platform (HPP)
A low-latency platform that connects directly to the Digital Lynx SX motherboard, providing real-time data analysis and response for low-latency feedback stimulation experiments.
With HPP, researchers can analyze and respond to input signals in less than 1 millisecond.
HPP can execute experiment stimuli with precise control of Digital Lynx SX analog and digital outputs. HPP contains a customizable processor that communicates with the DL-SX motherboard, providing low-latency access to the input acquisition data - both the analog data and the TTL I/O. Process data from all Digital Lynx SX inputs, including:
- Buffered tethered headstages / Digital Lynx input boards
- FreeLynx wireless digital telemetry headstages
- Digital multiplexing (MUX) headstages
Example Applications
- Spike detection and classification
- Neural ensemble detection and burst analysis
- Low frequency narrow band signal response (ie., Alpha, Theta, Gamma)
- Digital signal filtering and other DSP functions
- Experiment control
- Analog signal output
- Complex stimulation
- Precision TTL pulse trains
HPP is now included in all new DLSX systems. Please contact us for upgrading an existing system that did not include HPP.
Documents:
HPP Applications Project
The HPP Applications project will provide packaged applications that target the Neuralynx Hardware Processing Platform (HPP) for common real-time feedback loop and analysis processes using the Digital Lynx SX acquisition system.
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Oscillation Detection
This is a closed-loop application that runs on the HPP, detecting oscillation power within the sharp wave ripple (150 to 250 Hz) or theta band (4 to 12 Hz). When the oscillation has been confirmed, this application triggers a stimulus via a TTL output pulse. An oscillation is confirmed when the oscillation power is above a user defined threshold for the amount of time set by the user.
Download Oscillation Detection for HPP (ZIP) v1.1 User Guide for Oscillation Detection (PDF)
Specifications
| Programming Tools | MATLAB®, Simulink®, C++ (RTOS), VHDL (FPGA) |
| CPU | 1 GHz Dual ARM Cortex A9 |
| RAM | 1 GB DDR3 |
| Flash | 16 MB |
| Interface | SD Card |
| Connections | USB 2.0, Gigabit Ethernet, Serial UART, JTAG |
Publications
- Closed-Loop Interruption of Hippocampal Ripples through Fornix Stimulation in the Non-Human Primate
Omid Talakoub, Andrea Gomez Palacio Schjetnan, Taufik A. Valiante, Milos R. Popovic, Kari L. Hoffman - Harnessing ‘Time’ to Enhance Memory: Using Closed-Loop Technology To Facilitate Oscillatory Synchrony & Support Cognition
Andrew Garcia